Contracts\StackWalk\Context\AMD64\AMD64Unwinder.cs (39)
118if (unwindOp.UnwindOp == UnwindCode.OpCodes.UWOP_SET_FPREG_LARGE)
139if (unwindOp.UnwindOp == UnwindCode.OpCodes.UWOP_SET_FPREG)
143if (unwindOp.UnwindOp == UnwindCode.OpCodes.UWOP_SET_FPREG_LARGE)
537if (unwindOp.UnwindOp == UnwindCode.OpCodes.UWOP_EPILOG)
572if (unwindOp.UnwindOp == UnwindCode.OpCodes.UWOP_EPILOG)
707if (unwindOp.UnwindOp == UnwindCode.OpCodes.UWOP_PUSH_NONVOL ||
708unwindOp.UnwindOp == UnwindCode.OpCodes.UWOP_PUSH_MACHFRAME)
751if (unwindOp.UnwindOp != UnwindCode.OpCodes.UWOP_PUSH_NONVOL)
780(unwindOp.UnwindOp == UnwindCode.OpCodes.UWOP_ALLOC_SMALL) && (unwindOp.OpInfo == 0))
799if (unwindOp.UnwindOp == UnwindCode.OpCodes.UWOP_PUSH_MACHFRAME)
847if (unwindOp.UnwindOp > UnwindCode.OpCodes.UWOP_SET_FPREG_LARGE)
856if (unwindOp.UnwindOp > UnwindCode.OpCodes.UWOP_PUSH_MACHFRAME)
873case UnwindCode.OpCodes.UWOP_PUSH_NONVOL:
886case UnwindCode.OpCodes.UWOP_ALLOC_LARGE:
913case UnwindCode.OpCodes.UWOP_ALLOC_SMALL:
924case UnwindCode.OpCodes.UWOP_SET_FPREG:
938case UnwindCode.OpCodes.UWOP_SET_FPREG_LARGE:
959case UnwindCode.OpCodes.UWOP_SAVE_NONVOL:
973case UnwindCode.OpCodes.UWOP_SAVE_NONVOL_FAR:
985case UnwindCode.OpCodes.UWOP_EPILOG:
992case UnwindCode.OpCodes.UWOP_SPARE_CODE:
1003case UnwindCode.OpCodes.UWOP_SAVE_XMM128:
1014case UnwindCode.OpCodes.UWOP_SAVE_XMM128_FAR:
1025case UnwindCode.OpCodes.UWOP_PUSH_MACHFRAME:
1168public OpCodes UnwindOp = (OpCodes)((value >> 8) & 0xF); // bits 9-12 (4 bits)
1175UnwinderAssert(UnwindOp != OpCodes.UWOP_SPARE_CODE);
1178OpCodes.UWOP_PUSH_NONVOL => 1u,
1179OpCodes.UWOP_ALLOC_LARGE => OpInfo != 0 ? 3u : 2u,
1180OpCodes.UWOP_ALLOC_SMALL => 1u,
1181OpCodes.UWOP_SET_FPREG => 1u,
1182OpCodes.UWOP_SAVE_NONVOL => 2u,
1183OpCodes.UWOP_SAVE_NONVOL_FAR => 3u,
1184OpCodes.UWOP_EPILOG => 2u,
1186OpCodes.UWOP_SPARE_CODE => 3u,
1187OpCodes.UWOP_SAVE_XMM128 => 2u,
1188OpCodes.UWOP_SAVE_XMM128_FAR => 3u,
1189OpCodes.UWOP_PUSH_MACHFRAME => 1u,
1190OpCodes.UWOP_SET_FPREG_LARGE => 3u,