Contracts\StackWalk\Context\AMD64\AMD64Unwinder.cs (39)
118if (unwindOp.UnwindOp == UnwindCode.OpCodes.UWOP_SET_FPREG_LARGE)
139if (unwindOp.UnwindOp == UnwindCode.OpCodes.UWOP_SET_FPREG)
143if (unwindOp.UnwindOp == UnwindCode.OpCodes.UWOP_SET_FPREG_LARGE)
535if (unwindOp.UnwindOp == UnwindCode.OpCodes.UWOP_EPILOG)
570if (unwindOp.UnwindOp == UnwindCode.OpCodes.UWOP_EPILOG)
705if (unwindOp.UnwindOp == UnwindCode.OpCodes.UWOP_PUSH_NONVOL ||
706unwindOp.UnwindOp == UnwindCode.OpCodes.UWOP_PUSH_MACHFRAME)
749if (unwindOp.UnwindOp != UnwindCode.OpCodes.UWOP_PUSH_NONVOL)
778(unwindOp.UnwindOp == UnwindCode.OpCodes.UWOP_ALLOC_SMALL) && (unwindOp.OpInfo == 0))
797if (unwindOp.UnwindOp == UnwindCode.OpCodes.UWOP_PUSH_MACHFRAME)
845if (unwindOp.UnwindOp > UnwindCode.OpCodes.UWOP_SET_FPREG_LARGE)
854if (unwindOp.UnwindOp > UnwindCode.OpCodes.UWOP_PUSH_MACHFRAME)
871case UnwindCode.OpCodes.UWOP_PUSH_NONVOL:
884case UnwindCode.OpCodes.UWOP_ALLOC_LARGE:
911case UnwindCode.OpCodes.UWOP_ALLOC_SMALL:
922case UnwindCode.OpCodes.UWOP_SET_FPREG:
936case UnwindCode.OpCodes.UWOP_SET_FPREG_LARGE:
957case UnwindCode.OpCodes.UWOP_SAVE_NONVOL:
971case UnwindCode.OpCodes.UWOP_SAVE_NONVOL_FAR:
983case UnwindCode.OpCodes.UWOP_EPILOG:
990case UnwindCode.OpCodes.UWOP_SPARE_CODE:
1001case UnwindCode.OpCodes.UWOP_SAVE_XMM128:
1012case UnwindCode.OpCodes.UWOP_SAVE_XMM128_FAR:
1023case UnwindCode.OpCodes.UWOP_PUSH_MACHFRAME:
1166public OpCodes UnwindOp = (OpCodes)((value >> 8) & 0xF); // bits 9-12 (4 bits)
1173UnwinderAssert(UnwindOp != OpCodes.UWOP_SPARE_CODE);
1176OpCodes.UWOP_PUSH_NONVOL => 1u,
1177OpCodes.UWOP_ALLOC_LARGE => OpInfo != 0 ? 3u : 2u,
1178OpCodes.UWOP_ALLOC_SMALL => 1u,
1179OpCodes.UWOP_SET_FPREG => 1u,
1180OpCodes.UWOP_SAVE_NONVOL => 2u,
1181OpCodes.UWOP_SAVE_NONVOL_FAR => 3u,
1182OpCodes.UWOP_EPILOG => 2u,
1184OpCodes.UWOP_SPARE_CODE => 3u,
1185OpCodes.UWOP_SAVE_XMM128 => 2u,
1186OpCodes.UWOP_SAVE_XMM128_FAR => 3u,
1187OpCodes.UWOP_PUSH_MACHFRAME => 1u,
1188OpCodes.UWOP_SET_FPREG_LARGE => 3u,